Low noise buffer circuit for increasing digital signal transition slew rates
US6144240A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 1, 1999 |
| Grant date | Nov 7, 2000 |
| Priority date | — |
| Expiry date | Jun 1, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0013
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A low noise buffer circuit for increasing the slew rates of transitions between signal states of a digital signal while drawing minimal transient power supply current during such signal state transitions. Successive alternating digital signal inversion circuits conduct respective power supply source and sink currents which: are unregulated source currents and regulated sink currents during respective low-to-high output signal transitions; transition from unregulated source currents and regulated sink currents to regulated source currents and unregulated sink currents, respectively, during respective high output signal states; are regulated source currents and unregulated sink currents during respective high-to-low output signal transitions; and transition from regulated source currents and unregulated sink currents to unregulated source currents and regulated sink currents, respectively, during respective low output signal states.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.