Adaptive leading edge blanking circuit to eliminate spike on power switching transistor current sense signal
US6144245A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 29, 1998 |
| Grant date | Nov 7, 2000 |
| Priority date | — |
| Expiry date | Jun 29, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/161
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Leading-edge blanking circuits blank the leading edge of a current sense signal generated by sensing circuitry sensing the current through a switching field-effect transistor. A current sensor is employed to sense the magnitude of gate current being provided to the gate of the switching transistor by a driver circuit. A comparator indicates whether the sensed magnitude of the gate current exceeds a predetermined threshold current. A blanking circuit component, such as a transistor connected to ground, is also used. In one blanking circuit, the blanking component forces the current sense signal to zero when the comparator indicates that the gate current of the switching transistor exceeds the threshold current, and otherwise allows the value of the current sense signal to be determined by the current-sensing circuitry. In another blanking circuit, a latch is interposed between the comparator and the blanking component. The latch generates a blanking control signal to control the blanking component. The blanking control signal becomes asserted upon the assertion of a switching-control signal that controls the driver circuit, and becomes deasserted when the comparator indicates that t…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.