Non-volatile semiconductor memory device and method of manufacturing the same
US6144584A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 3, 1998 |
| Grant date | Nov 7, 2000 |
| Priority date | — |
| Expiry date | Nov 3, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Source line select transistors are provided corresponding to word lines. The source line select transistors are turned on in response to signal voltages on the corresponding word lines to connect a main source line to corresponding sub-source lines. The sub-source lines are arranged corresponding to sets of word lines. Programming/erasing are performed by using channel hot electrons and a Fowler-Nordheim current, by applying voltages to the word lines and the bit lines such that an excessive voltage may not be transmitted from the main source line to the sub-source line. Memory cell data can be precisely read out without an influence by a leak current of an over-erased or over-programmed memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.