Parallel decompression and compression system and method for improving storage density and access speed for non-volatile memory and embedded memory devices
US6145069A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 26, 1999 |
| Grant date | Nov 7, 2000 |
| Priority date | — |
| Expiry date | Apr 26, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/40
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A flash memory controller and/or embedded memory controller including MemoryF/X Technology that uses data compression and decompression for improved system cost and performance. The Compression Enhanced Flash Memory Controller (CEFMC) of the present invention preferably uses parallel lossless compression and decompression engines embedded into the flash memory controller unit for improved memory density and data bandwidth. In addition, the invention includes a Compression Enhanced Memory Controller (CEMC) where the parallel compression and decompression engines are introduced into the memory controller of the microprocessor unit. The Compression Enhanced Memory Controller (CEMC) invention improves system wide memory density and data bandwidth. The disclosure also indicates preferred methods for specific applications such as usage of the invention for solid-state disks, embedded memory and Systems on Chip (SOC) environments. The disclosure also indicates a novel memory control method for the execute in place (XIP) architectural model. The integrated parallel data compression and decompression capabilities of the CEFMC and CEMC inventions remove system bottle-necks and increase perfo…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.