Sub-bandgap reference using a switched capacitor averaging circuit
US6147548A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 16, 1999 |
| Grant date | Nov 14, 2000 |
| Priority date | — |
| Expiry date | Nov 16, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/30
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A sub-bandgap reference circuit yielding a reference voltage smaller than the bandgap voltage of silicon. The circuit generates a negative temperature coefficient signal V.sub.be and an oppositely tracking (positive temperature coefficient) .DELTA.V.sub.be, and takes the average of two signals related to .DELTA.V.sub.be -V.sub.be to yield a temperature-compensated voltage of one-half the bandgap voltage of silicon. The circuit features an unequal area current mirror feeding the diodes and resistors used to generate the .DELTA.V.sub.be -V.sub.be signals using low supply voltages (less than 1.5 volts). A standard CMOS implementation provides low power consumption at a supply voltage of only 1 volt with a good temperature coefficient. The averaging circuit may be implemented by a continuous time divider or by using switched capacitor techniques. The loop amplifier used in the .DELTA.V.sub.be -V.sub.be circuitry operates with low headroom in part due to a n-well biasing scheme that lowers the effective threshold voltage of the p-channel FETs used in the loop amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.