Correlator method and apparatus
US6148313A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 1998 |
| Grant date | Nov 14, 2000 |
| Priority date | — |
| Expiry date | Mar 30, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/15
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable digital correlator device, and associated correlation method, with a very efficient structure. In one aspect, two or more correlators share a common data sequence shift register. In another aspect, the data sequence shift register is comprised of random access memory (RAM) modules which allow efficient construction in field programmable gate array (FPGA) logic devices. Two's-complement data samples are multiplied by a reference sequence to produce unfinished two's-complement products, the products are summed with unsigned arithmetic in an adder containing population counters, and a correction factor is added after all other calculations are complete to convert the unsigned result back to a two's-complement number.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.