Integrated MPEG decoder and image resizer for SLM-based digital display system
US6151074A · kind A · utility
84Cited by
4References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 30, 1997 |
| Grant date | Nov 21, 2000 |
| Priority date | — |
| Expiry date | Sep 30, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/426
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A video processing unit (13) that decodes compressed video data and resizes the image represented by the video data. The video processing unit (13) has two processing engines--a decoding engine (24) and a scaling engine (25), which share a memory (23). A memory manager (22) handles data requests from the two engines, and handles reading and writing of the memory (22).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.