Flash memory device and verify method thereof
US6151250A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 1999 |
| Grant date | Nov 21, 2000 |
| Priority date | — |
| Expiry date | Oct 29, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3459
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A word line voltage supply circuit for a nonvolatile semiconductor memory device reduces power supply noise by deactivating a high voltage generator during a verify sensing operation. The word line voltage supply circuit includes a high voltage generator that produces a high voltage signal in response to a control signal from a controller. A voltage regulator regulates the high voltage signal to generate a verify voltage signal that is applied to a selected memory cell. The controller deactivates the control signal during a verify sensing operation so as to eliminate power supply noise caused by the pumping operation of the high voltage generator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.