Clock matching apparatus for a data reproduction system
US6151282A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 1999 |
| Grant date | Nov 21, 2000 |
| Priority date | — |
| Expiry date | Sep 30, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/10296
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A clock matching apparatus for a data reproduction system includes a phase error detection unit which detects a phase error of a clock signal based on samples of a readout signal output by a sampler of the data reconstruction system. A phase-locked loop supplies a phase-matched clock signal to the sampler by compensating for the phase error detected by the phase error detection unit. The phase error detection unit includes an edge detection unit which detects a sampling instant for an edge sample among the samples of the readout signal. A difference unit generates a difference in timing phase between the edge sample and a sync level, the sync level being a reference signal level corresponding to a level of the readout signal at the sampling instants thereof and defined based on a partial-response waveform, the difference in the timing phase being output to the phase-locked loop as the detected phase error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.