Automated method of burn-in and endurance testing for embedded EEPROM
US6151693A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 1998 |
| Grant date | Nov 21, 2000 |
| Priority date | — |
| Expiry date | Jun 19, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An on-chip processor is used as a controller for burn-in and endurance testing of embedded non-volatile memory. An automated test machine downloads a test program into the non-volatile memory. The downloaded program contains a test program to be run on the non-volatile memory. When the burn-in or endurance test equipment activates the processor, the processor executes the program and performs a test on the non-volatile memory. The same method can be utilized to perform either the burn-in or endurance tests. Only the clock and reset lines are required to operate the test. Since the clock and reset lines are part of the processor's standard inputs, the method performs burn-in and endurance testing of an embedded non-volatile memory without bringing out the memory's address, data and control lines to the package pins of the integrated circuit. Since the clock and reset lines are part of the standard burn-in and endurance test equipment, the method also performs the testing without the use of expensive burn-in or endurance test equipment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.