Bipolar transistor with polysilicon dummy emitter
US6153919A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 26, 1999 |
| Grant date | Nov 28, 2000 |
| Priority date | — |
| Expiry date | Jan 26, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A manufacturing method for semiconductor components is disclosed which will allow better precision in the definition of the doped areas of the components and the separation of differently doped areas. A selectively shaped area of, for example, polysilicon, defining the area or areas to be doped, is deposited on the component before the masks are applied. This makes the fitting of the masks less critical, as they only have to be fitted within the area of the polysilicon layer. In this way an accuracy of 0.1 .mu.m or better can be achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.