Fast bus driver with reduced standby power consumption
US6154089A · kind A · utility
10Cited by
3References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 4, 1998 |
| Grant date | Nov 28, 2000 |
| Priority date | — |
| Expiry date | Dec 4, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/017518
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated fast bus driver circuit with reduced standby power consumption for BiCMOS processes where the power consumption of the drive circuit corresponds to the output sink current. A feedback circuit is connected to detect voltage variations at the output terminal, and vary the base current of the output bipolar transistor to oppose the voltage variations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.