Upstream situated apparatus and method within a computer system for controlling data flow to a downstream situated input/output unit
US6154794A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 1996 |
| Grant date | Nov 28, 2000 |
| Priority date | — |
| Expiry date | Sep 8, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for controlling the flow of information (e.g., graphics primitives, display data, etc.) to an input/output unit within a computer controlled graphics system. The system includes a processor having a first-in-first-out (FIFO) buffer, a separate input/output unit with its FIFO buffer, and a number of intermediate devices (with FIFO buffers) coupled between the input/output unit and the processor for moving input/output data from the processor to the input/output unit. Mechanisms are placed within an intermediate device, very close to the processor, which maintain an accounting of the number of input/output data sent to the input/output unit, but not yet cleared from the input/output unit's buffer. These mechanisms regulate data flow to the input/output unit. By placing these mechanisms close to the processor, rather than within the input/output unit, the system allows a larger portion of the input/output unit's buffer to be utilized for storing input/output data before a processor suspend or interrupt is required. This leads to increased input/output data throughput between the processor and the input/output unit by reducing processor interrupts. The system als…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.