Integrating dual supply voltage by removing the drain extender implant from the high voltage device
US6157062A · kind A · utility
12Cited by
6References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 6, 1999 |
| Grant date | Dec 5, 2000 |
| Priority date | — |
| Expiry date | Apr 6, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A dual voltage chip is fabricated with no intermediate-doped (LDD or MDD) area in the high-voltage transistors by adjusting the gate sidewall spacer thickness and the source/drain implant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.