Isolation between power supplies of an analog-digital circuit
US6157073A · kind A · utility
116Cited by
6References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 28, 1998 |
| Grant date | Dec 5, 2000 |
| Priority date | — |
| Expiry date | Sep 28, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/601
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a composite integrated circuit including at least one well that separates analog and digital blocks of the circuit, this well being connected to a first terminal of a power supply of biasing of one of the two blocks, and being of type opposite to that of the circuit substrate, and a resistor being interposed on the well biasing link.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.