Electrical circuit configuration arranged in a casing

US6157544A · kind A · utility

Assignee

• ALCATEL · FR

Inventors

• Dieter Ferling · Stuttgart, DE
• Fred Buchali · Waiblingen, DE

Key dates

• Filing date: Jul 10, 1998
• Grant date: Dec 5, 2000
• Expiry date: Jul 10, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2224/16225
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

To protect the high frequency circuits arranged in a casing and which are operated at frequencies of >1 GHz to 100 GHz against inner electromagnetic perturbing radiation, the complete circuit (1) is equipped on both sides with a large area layer (3, 4) which absorbs electrical fluctuations. The layer (4), made from a material which absorbs electrical fluctuations, such as silicon with average conductivity, is arranged below the circuit carrier (1). The circuit carrier (1) with the components (5) is encapsulated by a dielectric material such as silicon sealing compound or epoxy resin. The layer (3) made from a sealing compound which absorbs electrical fluctuations, such as silicon filled with iron powder, is arranged above the encapsulated circuit carrier (1, 2).