Low loss driving circuit for plasma display panel
US6160531A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 1998 |
| Grant date | Dec 12, 2000 |
| Priority date | — |
| Expiry date | Oct 7, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G3/294
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a driving method utilizing a driving circuit for driving a plasma display unit of a plasma display panel. The plasma display unit is repeatedly charged for sustaining an image signal. The driving circuit comprises an inductor connected in parallel to two ends of the plasma display unit, a power supply for charging the plasma display unit and the inductor, a first switch connected between the power supply and the first end of the plasma display unit, a second switch connected between the first end of the plasma display unit and ground, a third switch connected between the power supply and the second end of the plasma display unit, and a fourth switch connected between the second end of the plasma display unit and ground. Each of the first and second switches comprises a transistor having a parasitic diode between the drain and source of each transistor. Each switch is switched on only when the potential difference between the source and drain of the transistor is 0V.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.