Line driver calibration circuit
US6160851A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 1998 |
| Grant date | Dec 12, 2000 |
| Priority date | — |
| Expiry date | Feb 26, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0266
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A calibration circuit adjusts a differential output voltage from a line driver circuit when the differential output voltage falls outside a specified tolerance range. The calibration circuit includes a sample and hold circuit which samples the differential output voltage and holds a representative signal. A comparator compares the held signal with a reference voltage signal. When the held signal is greater than the reference voltage signal the comparator outputs a LOW signal and when the held signal is less than the reference voltage signal the comparator outputs a HIGH signal. The comparator output signal is stored in a memory circuit of a control logic. The control logic instructs an up/down counter to increment when the comparator output is LOW and to decrement when the comparator output is HIGH. A calibration current source sinks a unit of calibration current when the comparator output is LOW and sources a unit of calibration current when the comparator output is HIGH. The calibration current is added to an input current to calibrate the differential output voltage towards the specified tolerance range. In a next cycle of the calibration sequence, if a new comparator output sig…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.