Apparatus for performing a division operation, especially for three-dimensional graphics
US6161120A · kind A · utility
3Cited by
1References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 7, 1998 |
| Grant date | Dec 12, 2000 |
| Priority date | — |
| Expiry date | Jul 7, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/49921
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to arithmetical computing devices, and especially to a division operation in three-dimensional (3D) graphics. A division f(a,b)=a/b is calculated by an integrated division circuit. In order to decrease the chip area and calculation time needed, the bit width of the divider and the dividend is reduced by preprocessing. Firstly, the scaling factor is searched in basis of the divider. Then both the divider and divident are scaled by the single scaling factor. Division is then done with these shrunk bit vectors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.