CMOS tri-state control circuit for a bidirectional I/O with slew rate control
US6163169A · kind A · utility
11Cited by
15References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 13, 1998 |
| Grant date | Dec 19, 2000 |
| Priority date | — |
| Expiry date | Aug 13, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09429
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital circuit pulls up an output node using an NFET device. The digital circuit is part of a CMOS predriver having balanced delays for coming out of tristate mode and for data mode operation. The predriver has size and speed capability advantages and is particularly advantageous when followed by a CMOS driver powered by a lower positive voltage supply.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.