Low noise method for interconnecting analog and digital integrated circuits
US6163197A · kind A · utility
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4References
4Claims
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Key dates
| Filing date | Aug 10, 1999 |
| Grant date | Dec 19, 2000 |
| Priority date | — |
| Expiry date | Aug 10, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018528
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for interconnecting digital and analog circuitry on separate substrates within a single integrated chip package attenuates logic level signals on one substrate, transmits the attenuated signals to another substrate, and amplifies the attenuated signals back to logic level signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.