Frequency/phase modulator using a digital synthesis circuit in a phase locked loop
US6163232A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 13, 2000 |
| Grant date | Dec 19, 2000 |
| Priority date | — |
| Expiry date | Mar 13, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/1806
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for generating a modulated signal contains a reference oscillator for generating a reference signal, a digital synthesis circuit having a clock input and an addition value input for generating a synthesis signal, and a phase comparator for generating a tuning signal depending on the result of a comparison of the phase of the reference signal with the phase of the synthesis signal. An oscillator is provided, which is controlled in a manner dependent on the tuning signal and serves for generating the modulated signal and a further oscillator signal, from which a clock signal present at the clock input of the digital synthesis circuit can be derived. The circuit has a drive device, which generates a digital drive signal from carrier frequency and modulation signals. The drive signal being present at the addition value input of the digital synthesis circuit. A circuit of this type provides a modulated signal having a high phase and frequency accuracy, has a low outlay on components and is readily integrable.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.