Modular arithmetic coprocessor comprising an integer division circuit
US6163790A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 9, 1998 |
| Grant date | Dec 19, 2000 |
| Priority date | — |
| Expiry date | Jul 9, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/5353
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A modular arithmetic coprocessor designed to perform computations according to the Montgomery method includes a division circuit to perform integer divisions. The integer division circuit computes the division of a binary data element A encoded on n+n (bits by a binary data element B encoded on n bits, A, B, n, n' and n" being on-zero integers. For this function, the integer division circuit includes: a first n-bit register and a second n-bit register to contain the binary data element A and the result of the division, a third n-bit register to contain an intermediate result, a fourth n-bit register to contain the binary data element B, two subtraction circuits each having a first series input and a second series input and a series output, and a test circuit having an input and an output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.