Fault detection and modification circuit
US6164550A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 19, 1998 |
| Grant date | Dec 26, 2000 |
| Priority date | — |
| Expiry date | Jun 19, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M1/82
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit in a smart card reader to detect when a variation in a power supply provided to a smart card has occurred, indicating a possible fault in the smart card. As an example, the circuit detects this variation by determining when the power supply has dropped below a reference voltage. If this happens, the circuit will modify the smart card control signals, for example, by clamping them at or near ground potential, thereby preventing any possible damage to either the smart card or the smart card reader.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.