Nonlinear image distortion correction in printed circuit board manufacturing
US6165658A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 1999 |
| Grant date | Dec 26, 2000 |
| Priority date | — |
| Expiry date | Jul 6, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/166
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a process for the fabrication of multilayer articles having electrical connections between conductor patterns on at least two layers of the multilayer article. The process comprises at least the steps of: PA1 a) using an initial set of image data describing a first article or layer having a conductor pattern thereon, forming the first article or layer having a pattern of conductive material thereon; b) taking data of an image of the pattern of conductive material on the first article or layer; c) determining from the image of the pattern of conductive material on the first article or layer the relative location of sites within the pattern of conductive material on said first article or layer that are to be connected to sites on a pattern of conductive material on at least a second layer having conductor patterns thereon; and thereafter performing steps selected from the group consisting of: PA1 I) modifying the initial set of image data for the first article or layer to make corrections for each conductive site within the pattern of conductive material and producing a corrected set of image data; PA1 II) modifying an initial set of data for at least…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.