Differential integrator having offset and gain compensation, not requiring balanced inputs
US6166581A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 1998 |
| Grant date | Dec 26, 2000 |
| Priority date | — |
| Expiry date | Dec 14, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H19/004
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed is a fully differential switched-capacitor integrator which accepts a single-ended or unbalanced input signal and compensates the offset and finite gain of the operational amplifier without an extra converter circuit. The proposed circuit utilizes a special input structure which adds special capacitors to store the offset and the low frequency noise of the operational amplifier. One preferred embodiment implements the switching means as transmission gates using CMOS transistors. Clock feedthrough is prevented by providing two non-overlapping clock phases with a delayed clock each, thus avoiding clock feed-through. The invention provides a good alternative for applications such as low noise filters and sigma delta modulators.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.