Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein
US6166953A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Oct 8, 1999 |
| Grant date | Dec 26, 2000 |
| Priority date | — |
| Expiry date | Oct 8, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having and electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as a microcomputer chip also has a processing unit and includes an input terminal for receiving an operation mode signal for switching the microcomputer between a first operation mode in which the flash memory is rewritten under control of a processing unit and a second operation mode in which the flash memory is rewritten under control of separate writing circuit externally connectable to the microcomputer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.