Method for addressing electrical fuses
US6166981A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2000 |
| Grant date | Dec 26, 2000 |
| Priority date | — |
| Expiry date | Feb 25, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/802
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device that includes a plurality of data storage cells; at least one redundancy data storage cell; a redundancy match detection circuit; and a means for coupling programmable fuses to the redundancy match detection circuit, wherein a defective data storage is replaced by one redundancy data storage when the redundancy match detection detects a pre-determined condition set by said programmable fuse is described. Decoding is accomplished by a data bus selecting the e-fuse to be blown. The data bus is also used for reading the state of the e-fuses to ensure that the e-fuses are correctly blown. Power is effectively applied to the selected e-fuses while sharing the data bus for e-fuse decoding and verification. In order to reduce the number of communication channels between e-fuses and the redundancy match detection circuitry, the transfer operation uses time multiplexing, allowing e-fuse information to be transferred to the redundancy match detection circuitry sequentially. The actual time multiplexing operation for performing the transfer is preferably enabled only after the chip power-up state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.