Dual mode receiver
US6167081A · kind A · utility
11Cited by
6References
41Claims
0Family size
Inventors
Key dates
| Filing date | Sep 3, 1999 |
| Grant date | Dec 26, 2000 |
| Priority date | — |
| Expiry date | Sep 3, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/03535
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A demodulation subsystem includes an equalizing demodulator and a non-equalization demodulator, each of which receive a baseband signal, and an output control selector that selects the output of one of the equalizing demodulator and the non-equalizing demodulator based on a bit error rate of the signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.