DVD controller with embedded DRAM for ECC-block buffering
US6167551A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 1998 |
| Grant date | Dec 26, 2000 |
| Priority date | — |
| Expiry date | Jul 29, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/00
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An embedded DRAM is incorporated inside a digital-versatile-disk (DVD) playback-controller integrated circuit. Data from the DVD optical disk is written to a data block in the embedded DRAM. Error correction is performed by reading the data block to generate syndromes and over-writing errors in the data block with corrections. Once the data block is corrected, it is copied or moved to a different area of the embedded memory, a host-buffer area. As the data block is moved, de-scrambling is performed to decrypt the data. The re-ordered data is stripped of overhead such as ECC bytes and written to the host-buffer area of the embedded DRAM. A checksum is generated as the data is moved, and the checksum is compared to a stored checksum to ensure that all errors were corrected. The data block in the host-buffer area is then transferred to a host. The embedded DRAM has a very wide data-access width of 16 bytes. The full width is used for writing data from the optical disk to the ECC data block buffer, and for reading data from the host-buffer area to the host. Narrower access widths are used by the error correction and de-scrambler blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.