Method for planarization of semiconductor device including pumping out dopants from planarization layer separately from flowing said layer
US6169026A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 24, 1998 |
| Grant date | Jan 2, 2001 |
| Priority date | — |
| Expiry date | Apr 24, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/909
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a method for planarizing a semiconductor device used in an integrated circuit. According to the method, a semiconductor substrate on which a patterned layer having topology is formed, is loaded into a reactor chamber. Afterwards, an interlevel insulating layer is formed on the semiconductor substrate. Thereafter, a layer for the planarization containing a dopant is formed on the interlevel insulating layer. The dopant contained in the layer for the planarization, is diffused outwards from the surface of the layer. The dopant diffused outwards from the layer for the planarization is pumped out to the outside of the reactor chamber without introducing an inert gas to the reactor chamber. Finally, the layer for the planarization is flowed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.