Apparatus and methods for high throughput self-timed domino circuits
US6169422A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 1998 |
| Grant date | Jan 2, 2001 |
| Priority date | — |
| Expiry date | Jul 20, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0963
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Asynchronous circuitry provides a domino circuit having short cycle times and zero overhead latency. The control circuit of a datapath circuit may utilize a completion signal from the datapath circuit to develop a request signal to the datapath circuit. The request signal may also be based on a request signal from a previous stage. Using the completion signal of a stage to develop the request signal for the same stage allows the circuitry to reduce the impact of constraints that are required for the asynchronous circuitry to operate. Similarly, using the request signal from a previous stage of the asynchronous circuitry to develop the request signal for a present stage also allows the circuitry to reduce the impact of constraints required to implement the asynchronous circuitry. These techniques allow the achievement of fast cycle times while maintaining zero overhead.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.