Current limited power MOSFET device with improved safe operating area
US6169439A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1997 |
| Grant date | Jan 2, 2001 |
| Priority date | — |
| Expiry date | Dec 30, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/0822
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit having a protected output field effect transistor (FET) (101). A drain-gate clamp circuit (105) is coupled to divert charge from the power FET drain electrode to the power FET gate electrode when excessive drain-source voltage is present. A drain-source current limit circuit (110) is coupled to divert charge from the power FET gate electrode to the power FET source electrode when a preselected drain-source current is achieved. A current limit inhibit circuit (115) is coupled between the current limit circuit and the power FET gate electrode, and having a control electrode coupled to the drain-gate clamp circuit. The current limit inhibit circuit (115) disables the current limit circuit (110) when charge flows in the drain-gate clamp circuit (105).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.