Pipelined analog-to-digital converter (ADC) systems, methods, and computer program products
US6169502A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 1998 |
| Grant date | Jan 2, 2001 |
| Priority date | — |
| Expiry date | May 8, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/442
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A pipelined analog-to-digital converter (ADC) is calibrated to enable production of an n-bit digital output representing an n-2 bit binary word, where "n" is a selected large positive integer, for example without limitation on the order of ten (10). In an analog-to-digital converter (ADC) having a plurality stages, each stage includes a stage input connection, a stage output connection, and a capacitor circuit including first and second predetermined capacitors (C.sub.1 and C.sub.2) and a variable capacitance calibration capacitor (Ccal). The first and second capacitors and the variable capacitance calibration capacitor are connected to each other at a capacitor common node. An amplifier input connection is connected to a capacitor common node. A comparator input connection (CIC) is connected to a stage input connection. A track and hold circuit (THC) is coupled to an amplifier output connection, and a source follower circuit (SF) is connected to a stage output connection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.