Apparatus and method for output signal pulse width error correction in a communications receiver
US6169765A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 28, 1997 |
| Grant date | Jan 2, 2001 |
| Priority date | — |
| Expiry date | May 28, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1565
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An output signal pulse width error correction circuit and method wherein errors in a data signal conforming to a communications protocol having a prescribed duty cycle are corrected by monitoring a duty cycle of the data signal, comparing the duty cycle to a duty cycle reference voltage corresponding to the prescribed duty cycle, and adjusting a pulse width of the data signal to conform to the prescribed duty cycle of the protocol. An embodiment is shown that low pass filters the input data signal to introduce greater slope to the input data signal which is then compared to a pulse width control voltage in order to generate an output data signal. The pulse width control voltage is produced by integrating the output data signal to obtain an average value corresponding to the duty cycle of the output data signal and comparing the average value to a duty cycle reference voltage corresponding to the prescribed duty cycle for the communications protocol. Another embodiment directed toward an integrated circuit implementation is shown that converts the input data signal into complementary input data current signals, using current mirror circuits, which are used to drive complementary var…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.