Hybrid device, memory apparatus using such hybrid devices and information reading method
US6172903A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 22, 1999 |
| Grant date | Jan 9, 2001 |
| Priority date | — |
| Expiry date | Sep 22, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/15
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A hybrid device includes a magnetoresistance (MR) element, a resistor connected in series to an end of the MR element, and a field effect transistor (FET) having its gate electrode connected to the connection point of the MR element and the resistor. The hybrid device constitutes an essential part of a memory apparatus, in which the other end of the MR element and the drain electrode of the FET are grounded, a voltage source is provided for applying a predetermined voltage to the MR element, and a second voltage source or a current source is provided for flowing a drain current in the FET. The memory apparatus can record information by utilizing two different states of the resistance of the MR element. The FET functions both as an switching element for writing/reading information and an amplifying element for boosting the resistance difference. The memory apparatus may comprise a plurality of hybrid devices wired so as to form an XY-matrix pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.