Silicon-oxide-nitride-oxide-semiconductor (SONOS) type memory cell and method for retaining data in the same
US6172907A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 22, 1999 |
| Grant date | Jan 9, 2001 |
| Priority date | — |
| Expiry date | Oct 22, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/69
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a nonvolatile storage circuit (100) can include a volatile portion (102) that includes p-channel metal-oxide-semiconductor (MOS) transistors (106-0 and 106-1) and n-channel MOS (NMOS) transistors (108-0 and 108-1) arranged in a complementary MOS (CMOS) latch configuration. Also included are nonvolatile devices (116-0 and 116-1) disposed between PMOS transistor 106-0 and NMOS transistor 108-0, and between PMOS transistor 106-1 and NMOS transistor 108-1. Nonvolatile devices (116-0 and 116-1) can include silicon-oxide-nitride-semiconductor (SONOS) transistors that can be programmed to opposite states to recall a logic value when power is applied to the nonvolatile storage circuit (100). In a read mode, a bias voltage VBIAS can be applied to nonvolatile devices (116-0 and 116-1) that tends to retain charge in both nonvolatile devices (116-0 and 116-1).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.