Demodulation circuit including error correction
US6173020A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 26, 1999 |
| Grant date | Jan 9, 2001 |
| Priority date | — |
| Expiry date | Jan 26, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0071
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A demodulation circuit including error correction based on convolution coding and Viterbi decoding by which the characteristic of error correction is further improved. The demodulation circuit including error correction demodulates a burst data signal received in a satellite communication channel having a low carrier power to noise power ratio using reference bits, the reference bits are removed from the demodulated burst data, the burst data are deinterleaved, from which the reference bits have been removed, in accordance with specifications, and Viterbi decoding decodes convolutionally coded burst data, and weighting includes each value of the demodulated burst data in accordance with the distance from the reference bits of the burst data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.