Apparatus and method for providing multiple channel clock-data alignment
US6173380A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 1998 |
| Grant date | Jan 9, 2001 |
| Priority date | — |
| Expiry date | Jul 16, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0038
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for aligning any number of multiple parallel channels of data signals according to a single clock is provided. The synchronization process is accomplished through the use of a First-In-First-Out (FIFO) principle and individual storage elements implementing the FIFO principle for each received data channel. Each channel's data signals are read into a corresponding storage element, maintained in order, and read out upon the assertion of read signals in synchronization with a designated single clock signal. The apparatus and method preferably uses indications of data ready to be read from a storage element implementing the FIFO principle and the presence of a master clock signal to activate the reading of the data from the corresponding storage element. Therefore, each data channel is fully aligned with the master clock signal. The clock-data alignment function may be implemented for a 100BASE-T4 receiver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.