Semiconductor memory device and method of fabricating the same
US6175132A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 12, 1999 |
| Grant date | Jan 16, 2001 |
| Priority date | — |
| Expiry date | Oct 12, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/31
Abstract
There is provided a semiconductor memory device including (a) at least one electrode such as a gate electrode, (b) a first region in which a memory cell is formed, and (c) a second region in which a peripheral circuit is formed and which is adjacent to the first region. A sloped or stepped region is formed at a boundary between the first and second regions. The electrode is designed to have a projecting portion projecting upwardly in the sloped or stepped region. The semiconductor memory device eases steep of the sloped or stepped region. In addition, since the semiconductor memory device includes no additional elements to decrease the angle, the semiconductor memory device remains to have the same area as an area of a conventional semiconductor memory device having a steeply sloped or stepped region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.