Distributed memory switching hub
US6175571A · kind A · utility
1,502Cited by
15References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 9, 1997 |
| Grant date | Jan 16, 2001 |
| Priority date | — |
| Expiry date | Dec 9, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/3009
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A distributed memory switching hub interconnecting heterogeneous local area networks operating at different transmission speeds for receiving, storing and forwarding frames of data. The distributed memory switching hub employs a distributed memory architecture in which memory storage for frames of data received and to be transmitted is located at each low speed LAN port of the distributed memory switching hub. A distributed memory architecture renders unnecessary the need for a central programmable processor or shared common memory to store and forward frames received by the distributed memory switching hub.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.