Apparatus for determining the instantaneous average number of instructions processed
US6175814A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 1997 |
| Grant date | Jan 16, 2001 |
| Priority date | — |
| Expiry date | Nov 26, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/885
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus is provided for determining an average number of instructions entering a stage of a processor pipeline of a computer system during a clock cycle of a processor clock. The number of instructions entering a particular stage of the pipeline are stored in a queue during each of a predetermined number (N) of clock cycles. The total number of instructions processed over the last P clock cycles is computed, where P is less than or equal to N. The total number of instructions processed is divided by the last P processor cycles to yield the instantaneous average number of instructions processed for each processor cycle. This average number of instructions processed is communicated to software.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.