Reducing timing variance of signals from an electronic device
US6175928A · kind A · utility
22Cited by
19References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 1997 |
| Grant date | Jan 16, 2001 |
| Priority date | — |
| Expiry date | Dec 31, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A time delay from a triggering event to switching of an output signal in a microelectronic device can be adjusted to compensate for various characteristics of the electronic device. The characteristics include temperature, voltage, and manufacturing process conditions. The time delay is adjusted using a variable delay circuit having multiple delay cells that are selectively coupled to control the time delay. The conditions of the electronic device are detected using a process sensor, which includes an oscillator having a frequency that is sensitive to variations in the conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.