System for converting instructions, and method therefore
US6178496A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 17, 1999 |
| Grant date | Jan 23, 2001 |
| Priority date | — |
| Expiry date | Feb 17, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30156
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A converter (130) comprises a multiplex-buffer (410) at a bus (120), a decoder (420), an output buffer (430) and a comparator (440). The multiplex-buffer (410) forwards V.sub.MAX bits (260) of Huffman coded code portions (222) from the bus (120) to the decoder (410). The V.sub.MAX bits (260) can comprise further bits set to logical "1" or "0" at random. On a control output (414), the multiplex-buffer (410) provides a signal K identifying which of the V.sub.MAX bits are valid or invalid. The decoder (420) maps the V.sub.MAX bits (260) into a preliminary bit cluster (426) and indicates a code length V regardless whether some or all bits are valid or not. The comparator (440) checks V and K and allows the output buffer (430) to copy the preliminary bit cluster (426) into instruction portions (212) only when the code length fits the identification of valid bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.