Tamper resistant methods and apparatus
US6178509A · kind A · utility
154Cited by
29References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 5, 1997 |
| Grant date | Jan 23, 2001 |
| Priority date | — |
| Expiry date | Sep 5, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2151
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one apparatus, a number of obfuscated programming instructions is provided to perform integrity verification on a number of other plain text programming instructions. In another apparatus, a number of obfuscated programming instructions is provided to self-verify an invocation of the obfuscated programming instructions is not originated from an intruder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.