Display format conversion circuit with resynchronization of multiple display screens
US6181300A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 1998 |
| Grant date | Jan 30, 2001 |
| Priority date | — |
| Expiry date | Sep 9, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/04
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display data format conversion circuit and method facilitates display of data on a plurality of display devices based on display data of a source display device. The system incorporates a resynchronization circuit that dynamically varies a frame rate of one display device based on the instantaneous frame rate of the source device to maintain synchronization of the displays. A display timing generator circuit for a first display, such as an LCD display, produces a first display timing signal. The resynchronization circuit is operatively responsive to the first display timing signal and a second display timing signal wherein the second display timing signal is associated with a second display device, such as a source display device. In one embodiment, the resynchronization circuit includes a vertical blanking time variation circuit that adaptively and continuously varies the frame rate of the first display device by varying a vertical blanking time of the first display device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.