Semiconductor device
US6181633A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 1999 |
| Grant date | Jan 30, 2001 |
| Priority date | — |
| Expiry date | Nov 4, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes memory cells, each of which is a dynamic storage device, a memory cell array where the memory cells in a predetermined number are arranged in a matrix, the memory cells being connected to intersections of orthogonal word lines and bit lines; first sense amplifying circuits for amplifying electric potentials of the bit lines; main bit lines arranged in parallel to the bit lines; a memory block array formed such that a plurality of memory blocks including switching circuits share the main bit lines, the switching circuits controlling conductivity between outputs of the first sense amplifying circuits and the main bit lines; first selecting means for selecting the word lines and the first sense amplifying circuits belonging to at least one memory block of the plurality of memory blocks; second selecting means for selecting the switching circuits belonging to one memory block of the plurality of memory blocks; a control signal generating circuit for controlling the second selecting means. The semiconductor device includes a program circuit for programmably selecting either one of: acquiring addresses that specify positions of the memory cells as addresse…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.