Method of manufacturing semiconductor device requiring less manufacturing stages
US6184101A · kind A · utility
7Cited by
1References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 24, 1998 |
| Grant date | Feb 6, 2001 |
| Priority date | — |
| Expiry date | Jul 24, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3065
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device, wherein, a silicon oxide film formed on a P-type silicon substrate is patterned, after which element separating trenches with a wider aperture width and a buried layer drawing trench with a narrower aperture width are formed at the same time. The buried layer drawing trench is filled with a conductive film such as a tungsten film, which also forms concave parts at the element separating trenches. The semiconductor is exposed at the bottom parts of the element separating trenches to be etched and form complete element separating trenches penetrating through the buried layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.