Method to prevent delamination of spin-on-glass and plasma nitride layers using ion implantation
US6184123A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 2, 1999 |
| Grant date | Feb 6, 2001 |
| Priority date | — |
| Expiry date | Aug 2, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76829
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming an integrated circuit device using ion implantation to improve the adhesion of plasma nitride to spin-on-glass is achieved. Semiconductor device structures are provided in and on a substrate where conductive connections are planned between the device structures and planned conductive traces overlying a planned interlevel dielectric layer. An insulating oxide layer is deposited overlying the device structures. A spin-on-glass layer is coated overlying the insulating oxide layer. The spin-on-glass layer is dried. The spin-on-glass layer is ion implanted to form an amorphous, silicon rich, adhesion layer at the top surface of the spin-on-glass layer. The spin-on-glass layer is cured. A first plasma-enhanced silicon nitride layer deposited overlying the adhesion layer of the spin-on-glass and completing the interlevel dielectric layer. Via openings are etched through to the top surfaces of the semiconductor device. A conductive layer is deposited to fill the via openings and is etched to form the conductive traces. A second plasma-enhanced silicon nitride layer is deposited to complete the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.