Thin multi-layer circuit board having a remodeling pad layer and a metallic barrier layer with an exclusion zone
US6184476A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 18, 1997 |
| Grant date | Feb 6, 2001 |
| Priority date | — |
| Expiry date | Jun 18, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49144
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A thin multi-layer circuit board having alternately stacked wiring pattern layers, including a top wiring pattern layer and insulating layers on an insulating plate-like substrate. The wiring pattern layers are electronically connected through vias in the insulating layers to form a predetermined circuit pattern by said wiring pattern layers. A metallic barrier layer is formed on the top wiring pattern layer, except at an exclusion zone of the metallic barrier layer. An electronic part-mounting pad layer and a remodeling pad layer are formed on the metallic barrier layer. The remodeling pad layer is arranged adjacent the electronic part-mounting pad layer, with the exclusion zone therebetween.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.